Filter
Top Products
MZ3500
3-3.
Sub CPU and I/O
port
SUB
CPU
AS6 5
ASS
2
AS4
i
AST 4_
*""
5
"MT
6
Y6
4G
Y4
Gl
Yl
YO
74LS138
J
s07
*.
~9
S06
_JQ
SOS ^
J
r
CKP
1 .
CSP
2
.Jl
SO4
^ . .
......
0
12
S03 ,. -^
D
15
S
°
2
HEC3
-C*
14
"SOT
-^
D
15
'*°°
r
MAIN
CPU
\m
Shown
at the
left
is the
circuit
used
by
the CPU to
select
the I/O
ports
The out
put
address
from
the sub CPU is
decoded
by the
74LS138to
create
the
select
signal.
Shown
below
is the
address
map and
select
signals.
AS
7654
M
£X\
8
8
1
23456789ABCDEF
8
8
Signal
description
0000
soo
Output
signal
to set the
flipflop
to
apply
interrupt
(INTO)
to the
main CPU.
Enables
communication between
CPU's.
0001
S01
8251
8251
SIO
chip
select.
ASO
is
used
for
data
control
selection.
AS1,
AS2,
and ASS are
"don't
care".
0010
S02
8253
8253
counter
chip
select.
ASO
and AS1 are
used
for
programming during write.
AS2 and ASS are
"don't care".
0011
S03
8255
8255
PIO
chip
select.
ASO
and AS1 are
used
for
port/control
selection.
AS2
and ASS are
"don't care".
0100
S04
input port
select
8-bit
input port.
Used
for
read.
AS3
are
"don't
care".
0101
805
CRT
control
I/O
port
chip
select.
AS1,
AS2,
and ASS are
used
for
write.
ASO
is
"don't care".
0110
S06
UPD7220
(graphic)
chip
select.
ASO
is
used
for
read
and
write.
AS1,
AS2,
and AS3 are
"don't
care"
0111
S07
UPD7220
(character)
chip
select.
ASO
is
used
for
read
and
write.
AS1, AS2,
and AS3 are
"don't
care"
1000
1001
1010
1011
1100
1101
1110
1111
NOT USE
-
18-