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Triggering on Waveforms
3–76
TDS 500C, TDS 600B, & TDS 700C User Manual
2. Select the rising or falling edge from the side menu.
Press the TRIGGER MENU ➞ Type (main) ➞ Edge (pop-up) ➞
Level (main) ➞ Level, Set to TTL, Set to ECL, or Set to 50% (side).
Level lets you enter the trigger level using the general purpose knob or the
keypad.
Set to TTL fixes the trigger level at +1.4 V.
Set to ECL fixes the trigger level at –1.3 V.
NOTE. When you set the volts/div smaller than 200 mV, the oscilloscope reduces
the Set to TTL or Set to ECL trigger levels below standard TTL and ECL levels.
This reduction occurs because the trigger level range is fixed at ±12 divisions
from the center. At 100 mV (the next smaller setting after 200 mV) the trigger
range is ±1.2 V, which is smaller than the typical TTL (+1.4 V) or ECL (–1.3 V)
level.
Set to 50% fixes the trigger level to approximately 50% of the peak-to-peak
value of the trigger source signal.
Triggering Based on Logic
The TDS Oscilloscope can trigger on a logic or binary pattern and on the state of
a logic pattern at the time it is clocked. It can also trigger on data that violates
setup and hold times relative to a clock. This subsection describes how to use
these three classes of logic triggering: pattern, state, and setup/hold.
A pattern trigger occurs when the logic inputs to the logic function you select
cause the function to become TRUE (or at your option FALSE). When you use a
pattern trigger, you define:
H The precondition for each logic input — logic high, low, or do not care (the
logic inputs are channels 1, 2, 3, and 4)
To Set Level