Filter
Top Products
AMD
P R E L I M I N A R Y
40
Am79C930
Pin 126: TXCMD
The TXCMD pin may be configured to drive a trans-
ceiver control reference signal, using one of two timing
sources plus input from the TXCMD bit of TIR11
(TIR11[0]), according to the following table:
RCEN TXCMD Pin TXCMD Pin
TIR11[3] Direction Value
0 O O_TX
1OTIR11[0] & T1
Transmit state machine generated signals T1, T2, T3,
TXP
_
ON
and
O_TX
have the timing indicated in the
diagram in section
Am79C930-Based TX Power
Ramp Control.
Pin 129: TXPE
The TXPE pin may be configured to drive a transceiver
control reference signal, using one of two timing sources
plus input from the TXPE bit of TIR11 (TIR11[1]) and
the TXPEPOL bit of TCR27, according to the
following table:
Transmit state machine generated signals T1, T2, T3,
TXP
_
ON
and
O_TX
have the timing indicated in the
diagram in section
Am79C930-Based TX Power
Ramp Control.
RCEN TXPEPOL TXPE Pin TXPE Pin
TIR11[3] TCR27[1] Direction Value
0 0 O TXP_ON
0 1 O TXP_ON
10OTIR11[1] & T2 (& = logical ‘AND’)
1 1 O TIR11[1] + T2 (+ = logical ‘OR’)
Pin 131: TXMOD
The TXMOD pin may be configured to drive a trans-
ceiver control reference signal, using input from the
TXMOD bit of TIR11 (TIR11[2]) and the TXMODPOL bit
of TCR27, according to the following table:
Transmit state machine generated signals T1, T2, T3,
TXP
_
ON
and
O_TX
have the timing indicated in the
diagram in section
Am79C930-Based TX Power
Ramp Control.
RCEN TXMODPOL TXMOD Pin TXMOD Pin
TIR11[3] TCR27[0] Direction Value
00O T3
01O T3
10OTIR11[2] & T3 (& = logical ‘AND’)
1 1 O TIR11[2] + T3 (+ = logical ‘OR’)
Pin 132: ANTSLT
The ANTSLT pin may be configured to drive an inter-
nally generated antenna selection signal using the inter-
nal antenna diversity circuitry, or it may be controlled by
a register bit. Pin functionality is programmed according
to the following table:
If it is necessary to force ANTSLT to be always constant,
then program ANTS to 0 or user ANTSLT pin, which can
be controlled by ANTSLTD (TCR7:[1]).
TX ANTSEN ANTEN
Mode (TIR16[[3]) (TIR4:[7])
0 0 0 ANTSLT <= low
0 1 0 ANTSEL <= ANTS (TIR26:[4])
0 X 1 ANTSLT <= internal ANTSEL
1 X X ANTSLT <= low
Pin 141: ANTSLT/LA23
The ANTSLT/LA23 pin may be configured to operate as
input or output and may be configured to drive an
internally generated antenna selection reference signal
using the internal antenna diversity circuitry. Note that