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3) The attached Printer SIMM map shows the memory map for 4 SIMMs combined.
(6) ROM block
ROMs store the CPU control program and font data. ROMs are two 16Mbit masked ROMs and
two 8Mbit masked ROMs.
Optional sockets are available for two 8Mbit EPROM (µPD27C8000DZ-120 - NEC or equiva-
lent) for expansion.
ROM access time should be less than 120nsec.
8Mbit EPROMs can be used instead of a 16Mbit masked ROM. To allow this substitution, the
soldering points SP5, SP6 and SP7 should be soldered and the cutting points CP2, CP3 and
CP4 should be cut.
(7) DRAM block
DRAMs are used for receiving buffer or working area of the CPU. The DRAM block contains
four 4Mbit DRAMs, thus having 2MB memory capacity in total.
The refreshing method is CBR (Cas Before Ras).
DRAM access time should be less than 80nsec.