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SRPL8 Server System Product Guide 187
PCI Configuration and Device Map
Table 32. PCI Map
Device Segment Device Number
Hot Plug Controller A 00h
PCI Slot 1 A 04h
PCI Slot 2 A 05h
Embedded LVDS A 0Ah
Embedded VGA A 0Ch
PIIX4e A 0Fh
MAC A 14h
PB64 A 18h
PB64 A 19h
PB64 A 1Ah
PB64 A 1Bh
Hot Plug Controller B 00h
PCI Slot 3 B 04h
PCI Slot 4 B 05h
PCI Slot 5 B 06h
PCI Slot 6 B 07h
PID B 09h
Hot Plug Controller C 00h
PCI Slot 7 C 04h
PCI Slot 8 C 05h
Hot Plug Controller D 00h
PCI Slot 9 D 04h
PCI Slot 10 D 05h
Interrupts
The table below recommends the logical interrupt mapping of interrupt sources; it reflects a typical
configuration, but these interrupts can be changed by the user. Use the information to determine
how to program each interrupt. The actual interrupt map is defined using configuration registers in
the PIIX4E and the I/O controller. I/O Redirection Registers in the I/O APIC are provided for each
interrupt signal; the signals define hardware interrupt signal characteristics for APIC messages sent
to local APIC(s).
✏
NOTE
To disable either IDE controller and reuse the interrupt: If you plan to
disable either IDE controller to reuse the interrupt for that controller, you
must physically unplug the IDE cable from the board connector (IDE0) if a
cable is present. Simply disabling the drive by configuring the SSU option
does not make the interrupt available.