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Chapter 4 Register-Level Programming
© National Instruments Corporation 4-47 Lab-NB User Manual
4. Clear the A/D circuitry.
5. Program counter A1 and enable EXTCONV* and EXTTRIG input.
6. Service the DAQ operation.
Each of these programming steps is explained as follows.
1. Disable EXTCONV* and EXTTRIG input.
The EXTCONV* bit can be disabled by setting the GATA0 bit low. The GATA0 bit is low
whenever OUTA1 is high, regardless of the settings for the PRETRIG or EXTTRIGEN bits in
the ADC Configuration Register or the EXTTRIG signal. Writing 78 (hex) to the Counter A
Mode Register sets OUTA1 high. This write disables EXTCONV* and EXTTRIG input; that is,
any transitions on these two inputs are ignored.
2. Select analog input channel and gain and select posttrigger mode.
The analog input channel and gain are selected by writing to the A/D Configuration Register.
The SCANEN bit must be cleared for DAQ operations on a single channel. See the A/D
Configuration Register bit description earlier in this chapter for gain and analog input channel bit
descriptions. The PRETRIG bit must be cleared and the EXTRIGEN bit must be set high during
this write to the A/D Configuration Register. These settings select posttrigger mode.
3. Program counter A0.
Since a high-to-low transition on the counter A0 output initiates an A/D conversion, counter A0
output must be programmed to a high state. This ensures that counter A0 does not cause any
A/D conversions.
Write 34 (hex) to the Counter A Mode Register (select counter A0, mode 2) to force OUTA0 to a
high state. This is an 8-bit operation.
4. Clear the A/D circuitry.
Before the DAQ operation is started, the A/D FIFO must be emptied in order to clear any old
A/D conversion results. Empty the A/D FIFO after the counters are programmed because
programming the counters can cause spurious edges. Write 0 to the A/D Clear Register to empty
the FIFO (8-bit write) and read from the A/D FIFO (16-bit read). Ignore the data obtained while
reading the A/D Clear Register.
5. Program counter A1 and enable EXTCONV* and EXTTRIG input.
Counter A1 of the 8253(A) Counter/Timer is used as a sample counter. The sample counter
counts the number of A/D conversions and disables conversions when the programmed count is
reached. The sample count must be less than or equal to 65,535. The minimum sample count is
2. EXTTRIG is enabled as soon as counter A1 is programmed.