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Chapter 4 Register-Level Programming
© National Instruments Corporation 4-41 Lab-NB User Manual
3. Program counters A0 and A1.
This step involves programming counter A0 to generate periodic conversion pulses and
programming counter A1 to interrupt on terminal count mode (mode 0).
Counter A0 of the 8253(A) Counter/Timer is used as the sample-interval counter. A high-to-low
transition on the counter A0 output initiates a conversion. Counter A0 can be programmed to
generate a pulse once every N µsec. N is referred to as the sample interval, that is, the time
between successive A/D conversions. N can be between 2 and 65,535. The sample interval is
equal to the period of the timebase clock used by counter A0 multiplied by N. Two timebases
are available: a 1-MHz clock and the output of counter B0.
Counter A1 of the 8253(A) Counter/Timer is used as a sample counter. The sample counter
tallies the number of A/D conversions initiated by counter A0 and stops counter A0 when the
desired sample count is reached. The sample count must be less than or equal to 65,535. The
minimum sample count is 2.
Write 34 (hex) to the Counter A Mode Register (select counter A0, mode 2) to force OUT0 to a
high state prior to clearing the A/D FIFO. This is an 8-bit write operation.
Use the following sequence to program the sample counter:
a. Write 70 to the Counter A Mode Register (select counter A1, mode 0).
b. Write the least significant byte of M-1, where M is the sample count, to the counter A1 Data
Register.
c. Write the most significant byte of M-1, where M is the sample count, to the counter A1 Data
Register.
After you complete this programming sequence, counter A1 is configured to count A/D
conversion pulses and counter A0 output is in a high state.
4. Clear the A/D circuitry.
Before the DAQ operation is started, the A/D FIFO must be emptied in order to clear out any old
A/D conversion results. Empty the A/D FIFO after the counters are programmed because
programming the counters can cause spurious edges. Write 0 to the A/D Clear Register to empty
the FIFO (8-bit write), followed by a read from the A/D FIFO (16-bit read). Ignore the data
obtained in the read.
5. Program the sample-interval counter (counter A0).
This step involves programming counter A0 (the sample-interval counter) in rate generator mode
(mode 2).