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Lab-NB User Manual Index-2 © National Instruments Corporation
selecting analog input channel and
gain, 4-37
and posttrigger mode, 4-47
and pretrigger mode, 4-49
and timebase source for counter A0,
4-40, 4-43
A/D conversion
initiating, 3-5, 4-37
reading result, 4-37 to 4-38
A/D FIFO Register
clearing, 4-39, 4-41, 4-44, 4-47, 4-50
description, 4-10 to 4-11
output binary modes, 4-38
bipolar input mode A/D conversion
values (two's complement coding)
(table), 4-38
unipolar input mode A/D conversion
values (straight binary coding)
(table), 4-38
reading results of A/D conversion, 4-37
servicing DAQ operation, 4-42, 4-45,
4-48, 4-50
storing results of A/D conversion, 4-37
theory of operation, 3-4
ADC (analog-to-digital converter), 3-4
ADCINTEN bit
description, 4-32
interrupt programming for analog input
circuitry, 4-52
*ADCINTEN bit, 4-33
AIGND signal (table), 2-7
AMD 8253 Counter/Timer. See 8253
Counter/Timer Register groups.
analog data acquisition specifications, A-2
analog input calibration, 5-3 to 5-5
bipolar input calibration procedure, 5-4
to 5-5
gain calibration, 5-4 to 5-5
offset calibration, 5-4
board configuration, 5-4
unipolar input calibration procedure
gain calibration, 5-5
offset calibration, 5-5
analog input circuitry
block diagram, 3-3
programming, 4-36 to 4-38
A/D FIFO output binary modes, 4-38
bipolar input mode (two's
complement coding)
(table), 4-38
unipolar input mode (straight
binary coding) (table), 4-38
clearing, 4-39
initiating A/D conversion, 4-37
interrupt programming, 4-52
programming sequence, 4-36 to 4-38
reading A/D conversion result, 4-37
to 4-38
selecting analog input channel and
gain, 4-37
theory of operation, 3-4
Analog Input Register group, 4-5 to 4-12
A/D Clear Register
clearing A/D circuitry, 4-41,
4-44, 4-50
clearing analog input circuitry, 4-39
description, 4-12
A/D Configuration Register
description, 4-6 to 4-8
selecting analog input channel and
gain, 4-37
and posttrigger mode, 4-47
and pretrigger mode, 4-49
and timebase source for counter
A0, 4-40, 4-43
A/D FIFO Register
clearing, 4-39, 4-41, 4-44, 4-47, 4-50
description, 4-10 to 4-11
output binary modes, 4-38
reading results of A/D
conversion, 4-37
servicing DAQ operation, 4-42, 4-
45, 4-48, 4-50
storing results of A/D
conversion, 4-37
overview, 4-5
register map, 4-3
Status Register, 4-9
analog input settling time versus gain
(figure), 3-6