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Appendix A Specifications
© National Instruments Corporation A-3 Lab-NB User Manual
Voltage offset......................................................................±60 µV/° C
Explanation of Analog Output Specifications
Relative accuracy in a D/A system is the same as nonlinearity, because no uncertainty is added due to code width.
Unlike an ADC, every digital code in a D/A system represents a specific analog value rather than a range of values.
The relative accuracy of the system is therefore limited to the worst-case deviation from the ideal correspondence (a
straight line), excepting noise. If a D/A system has been calibrated perfectly, then the relative accuracy specification
reflects its worst-case absolute error.
Differential nonlinearity in a D/A system is a measure of deviation of code width from 1 LSB. In this case, code
width is the difference between the analog values produced by consecutive digital codes. A specification of ±1 LSB
differential nonlinearity ensures that the code width is always greater than 0 LSBs (guaranteeing monotonicity) and
is always less than 2 LSBs.
Digital I/O
Compatibility................................................................................TTL-compatible
Configuration................................................................................Three 8-bit ports (uses 82C55A PPI)
Input logic low voltage.............................................................0.8 V max
Input logic high voltage............................................................2.2 V min
Output logic low voltage
at output current = 2.5 mA..............................................0.4 V max
Output logic high voltage
at output current = –2.5 µA............................................3.7 V min
Input load current
0 ≤ V
IN
≤ 5 V......................................................................±1 µA max
Output current
at V
OL
= 0.5 V.....................................................................4.0 mA min
Output current
at V
OH
= 2.7 V....................................................................4.0 mA min
Timing I/O
Compatibility................................................................................TTL-compatible inputs and outputs. Counter gate and clock
inputs are pulled up with 4.7 kΩ resistors onboard.
Configuration................................................................................Six 16-bit counter/timers (uses two 8253s)
Input logic low voltage.............................................................0.8 V max
Input logic high voltage............................................................2.2 V min
Output logic low voltage
at output current = 1.6 mA.............................................0.45 V max
Output logic high voltage
at output current = -150 µA............................................2.4 V min
Input load current
0 ≤ V
IN
≤ 5 V.......................................................................(5.0 V - V
IN
) / 10 kΩ
Input capacitance at 1 MHz.....................................................10 pF max
Base clock frequency.................................................................2 MHz ±0.01%
Power Requirements (from Macintosh NuBus)
Power consumption
+5 VDC...................................................................................810 mA*
+12 VDC...................................................................................70 mA
-12 VDC..................................................................................100 mA
* Additional current up to 1 A can be drawn by the user through the 50-pin I/O connector.