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Lab-NB User Manual Index-12 © National Instruments Corporation
using EXTTRIG signal to initiate
(posttrigger mode), 4-45
using EXTTRIG signal to terminate
(pretrigger mode), 4-46
initializing Lab-NB board, 4-35 to 4-36
multiple A/D conversions on single
input channel, 4-39 to 4-45
controlled acquisition mode, 4-40
to 4-42
freerun acquisition mode, 4-43
to 4-45
overview, 4-39
multiple A/D conversions using external
timing, 4-46 to 4-51
controlled acquisition mode, 4-46
to 4-51
freerun acquisition mode, 4-51
multiple A/D conversions with channel
scanning, 4-51 to 4-52
register programming
considerations, 4-35
software programming choices, 1-2
to 1-4
when to consider programming, 1-4
registers. See also register-level
programming.
82C55A Digital I/O Register groups,
4-25 to 4-29
control words. See control words.
Digital Control Register, 4-29
overview, 4-25
Port A Register, 4-26
Port B Register, 4-27
Port C Register
description, 4-28
pin assignments (figure), 4-60,
4-62, 4-64
pin connections, 2-11 to 2-12
resetting of ports A and C
(warning), 2-11
set/reset control words
(table), 4-65
signal assignments (table), 2-12
status-word bit definitions for
bidirectional data path, 4-64
status-word bit definitions for
input, 4-60
status-word bit definitions for
output, 4-62
programming. See digital I/O
circuitry, programming.
8253 Counter/Timer Register groups,
4-16 to 4-24
Counter A Mode Register, 4-20
Counter A0 Data Register
description, 4-17
programming in controlled
acquisition mode, 4-40 to
4-42, 4-47
programming in freerun
acquisition mode, 4-43 to
4-44, 4-49
Counter A1 Data Register
description, 4-18
programming in controlled
acquisition mode, 4-41, 4-47
to 4-48
programming in freerun
acquisition mode, 4-44, 4-50
Counter A2 Data Register
description, 4-19
interrupt programming of analog
output circuitry, 4-54
Counter B Mode Register, 4-24
Counter B0 Data Register
description, 4-21
programming for controlled
acquisition mode, 4-40
programming in freerun
acquisition mode, 4-43 to 4-44
Counter B1 Data Register, 4-22
Counter B2 Data Register, 4-23
overview, 4-16
accessing with Macintosh, 4-1
Analog Input Register group, 4-5 to 4-12
A/D Clear Register
clearing A/D circuitry, 4-41,
4-44, 4-50
clearing analog input
circuitry, 4-39
description, 4-12
A/D Configuration Register
description, 4-6 to 4-8
selecting analog input channel
and gain, 4-37
and posttrigger mode, 4-47
and pretrigger mode, 4-49