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Appendix D Hardware Considerations
653X User Manual D-4 ni.com
Figure D-4. PCI/PXI-6534 Block Diagram
Handshaking
and Control
Request
Processing
Data Latches
and Drives
Internal
FIFOs
Bus
Interface
DMA/IRQ
Counter
and Timers
Clock
Selection
DAQ-DIO
Bus
Interface
SCARAB
Interface
SCARAB
Interface
FPGA
MITE
Interface
DMA/IRQ
Handshaking
and Control
RTSI
Interface
Data Lines
(32)
I/O Connector
Control
Lines (8)
20 MHz
Oscillator
PLL
For
PXI-6534
Only
10 MHz
PXI Clock
RTSI/PXI Trigger Bus
SCARAB Memory 0
SCARAB Memory 1
MITE
PCI
Interface
EEPROM
PCI I/O Channel