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© National Instruments Corporation I-9 653X User Manual
output timing diagram (figure), 3-17
overview, 3-12 to 3-13
burst input timing diagrams
default input timing diagram
(figure), 3-8
PCLK reversed (figure), 3-10
transfer example (figure), 3-6
burst output timing diagrams
output timing diagram (figure), 3-9
PCLK reversed (figure), 3-11
transfer example (figure), 3-6
connecting signals
handshaking I/O, 2-10 to 2-11
pattern I/O, 2-23
description (table), C-4
handshaking I/O and pattern I/O
(table), C-1
leading-edge protocol
input handshaking sequence
(figure), 3-29
input state machine (figure), 3-30
input timing diagram (figure), 3-31
output handshaking sequence
(figure), 3-32
output state machine (figure), 3-33
output timing diagram (figure), 3-34
level-ACK protocol
input handshaking sequence
(figure), 3-18
input state machine (figure), 3-19
input timing diagram (figure), 3-20
output handshaking sequence
(figure), 3-21
output state machine (figure), 3-22
output timing diagram (figure), 3-23
long-pulse protocol
input handshaking sequence
(figure), 3-35
input state machine (figure), 3-36
input timing diagram (figure), 3-37
output handshaking sequence
(figure), 3-38
output state machine (figure), 3-39
output timing diagram (figure), 3-40
polarity for handshaking I/O
comparison of handshaking protocols
(table), 3-4to3-5
controlling line polarity, 2-12
selecting polarity, 2-8
polarity for pattern I/O, 2-18
signal source for pattern I/O
choosing internal or external
source, 2-18
external REQ signal
source, 3-2 to 3-3
internal REQ signal
source, 3-1 to 3-2
trailing-edge protocol
input handshaking sequence
(figure), 3-25
input state machine (figure), 3-25
input timing diagram (figure), 3-26
output handshaking sequence
(figure), 3-27
output state machine (figure), 3-27
output timing diagram (figure), 3-28
requirements for getting started, 1-2
RGND signal (table), C-5
RTSI and PXI trigger bus interfaces,
D-10 to D-11
board, RTSI, and PXI bus clocks, D-10
RTSI and PXI bus triggers, D-11
RTSI trigger specifications, A-3
S
Schottky-diode termination
scheme, D-7 to D-9
signal connections, C-1 to C-7
50-pin signal connections, C-6 to C-7
accessories (table), C-7