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Chapter 3 Timing Diagrams
© National Instruments Corporation 3-21 653X User Manual
Note
With REQ edge latching enabled (default), the REQ edge determines when data
will be latched. Input data valid has to be held before the active going REQ edge a
minimum of t
rdi
ns. With REQ edge disabled, input data valid has to be held t
adi
after the
next active going ACK signal edge is asserted.
Figure 3-17.
Level ACK Output Handshaking Sequence
Reference
Point Action Steps
Initial State ACK is deasserted.
1 When the 653X device has data to output, it drives the data onto the data lines,
and then asserts ACK. ACK stays asserted, indicating the 653X device is ready,
until the active-going REQ edge occurs.
2 The peripheral device responds with an active-going REQ signal edge. ACK
stays asserted, indicating the 653X device is ready, until the active-going REQ
occurs. Since the REQ is already asserted, the 653X device will wait until it
deasserts and reasserts to deassert the ACK signal and request additional data.
3 The asserted REQ signal deasserts the ACK signal.
4 To slow down the data transfer, you can insert a programmable delay before the
ACK signal is asserted.
ACK
REQ
1
2
3
4
ACK and REQ are shown as active high.
Steps 1-4 are repeated for each transfer.
Initial State