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Chapter 3 Timing Diagrams
© National Instruments Corporation 3-31 653X User Manual
Figure 3-28.
Leading Edge Input Timing Diagram
Parameter Description Minimum Maximum
Input Parameters
t
rr*
REQ pulse width 75 —
t
r*r
REQ inactive duration 75 —
t
ar
ACK to next REQ 0 —
t
dir(1)
Input data setup to REQ active
(with REQ-edge latching)
0 —
t
rdi
Input data hold from REQ active
(with REQ-edge latching)
10 —
t
dir(2)
Input data setup to REQ
(with REQ-edge latching disabled)
0 —
t
adi
Input data hold from ACK
(with REQ-edge latching disabled)
0 —
Output Parameters
t
aa*
ACK pulse width 125 —
t
r*a*
REQ inactive to ACK inactive 150 —
All timing values are in nanoseconds.
REQ
Input Data Valid
(REQ-edge
latching disabled)
t
r*r
t
r*a*
t
dir(2)
t
adi
t
ar
t
aa*
t
rr*
ACK
Input Data Valid
(REQ-edge
latching)
t
rdi
t
dir(1)
ACK and REQ are shown as active high