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PCI-6110E/6111E User Manual I-4
©
National Instruments Corporation
GPCTR1_SOURCE signal, 4-32
GPCTR1_UP_DOWN signal,
4-34 to 4-35
questions about, C-4 to C-5
glitches, C-2
GPCTR0_GATE signal, 4-30 to 4-31
GPCTR0_OUT signal
description (table), 4-5
general-purpose timing connections, 4-31
signal summary (table), 4-7
GPCTR0_SOURCE signal, 4-29 to 4-30
GPCTR0_UP_DOWN signal, 4-31
GPCTR1_GATE signal, 4-32 to 4-33
GPCTR1_OUT signal
description (table), 4-4
general-purpose timing connections, 4-33
signal summary (table), 4-7
GPCTR1_SOURCE signal, 4-32
GPCTR1_UP_DOWN signal, 4-34 to 4-35
ground-referenced signal sources
description, 4-9
differential connections, 4-11
recommended configuration (table), 4-10
H
hardware installation
procedure, 2-1 to 2-2
unpacking PCI-6110E/6111E, 1-6
hardware overview
analog input, 3-2 to 3-5
dither, 3-4 to 3-5
input mode, 3-2 to 3-3
input polarity and range, 3-3 to 3-4
selection considerations, 3-4
analog output, 3-5
analog trigger, 3-6 to 3-9
block diagrams
PCI-6110E, 3-1
PCI-6111E, 3-2
digital I/O, 3-10
timing signal routing, 3-11 to 13
board and RTSI clocks, 3-12
CONVERT* signal routing
(figure), 3-11
programmable function inputs, 3-12
RTSI triggers, 3-13
I
input characteristic specifications, A-1 to A-2
input mode. See differential measurements.
input polarity and range, 3-3 to 3-4
actual range and measurement precision
(table), 3-3
selection considerations, 3-4
installation
hardware, 2-1to2-2
questions about, C-2
software, 2-1
unpacking PCI-6110E/6111E, 1-6
I/O connectors, 4-1 to 4-7
cable connectors for
PCI-6110E/6111E, 1-6
exceeding maximum ratings
(warning), 4-1
I/O signal summary (table), 4-6 to 4-7
pin assignments (figure), 4-2, B-2
signal descriptions (table), 4-3 to 4-5
L
LabVIEW and LabWindows/CVI application
software, 1-2to1-3
M
manual. See documentation.
PCI_E.book Page 4 Thursday, June 25, 1998 12:55 PM