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Again, this diagram can be redrawn as follows to simplify program structure and
coding and to save memory space.
00006 00007
LR 0000
00005
00001 00002
00003 00004 00000
Address Instruction Operands
00000 LD 00006
00001 AND 00007
00002 OR 00005
00003 AND 00003
00004 AND 00004
00005 LD 00001
00006 AND 00002
00007 OR LD ––
00008 AND 00000
00009 OUT LR 0000
The next and final example may at first appear very complicated but can be
coded using only two logic block instructions. The diagram appears as follows:
00000 00001
00500
00002 00003
01000 01001
00004 00005
00500
00006
Block cBlock b
Block a
The first logic block instruction is used to combine the execution conditions re-
sulting from blocks a and b, and the second one is to combine the execution
condition of block c with the execution condition resulting from the normally
closed condition assigned IR 00003. The rest of the diagram can be coded with
OR, AND, and AND NOT instructions. The logical flow for this and the resulting
code are shown below.
00000 00001
00500
00002 00003
01000 01001
00004 00005
00500
00006
Block c
Block bBlock a
OR LD
LD 00000
AND 00001
OR 00500
AND 00002
AND NOT 00003
LD 01000
AND 01001
LD 00006
LD 00004
AND 00005
AND LD
Address Instruction Operands
00000 LD 00000
00001 AND 00001
00002 LD 01000
00003 AND 01001
00004 OR LD ––
00005 OR 00500
00006 AND 00002
00007 AND NOT 00003
00008 LD 00004
00009 AND 00005
00010 OR 00006
00011 AND LD ––
00012 OUT 00500
Basic Ladder Diagrams Section 4-4