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SMSC AN 9.6 APPLICATION NOTE Revision 1.0 (08-14-08)
AN 9.6
SMSC LAN91C111 32/16/8-Bit Three-In-
One Fast Ethernet Controller -
Technical Reference Manual
1 Overview
This Technical Reference Manual provides detailed part-specific information and general system
design guidelines for the SMSC LAN91C111. Hardware engineers and software engineers should be
familiar with this material before interfacing the SMSC LAN91C111 to a microprocessor or
microcontroller.
This Manual is an active document and will be updated as required. The most recent version is
available from the SMSC Web site (www.smsc.com
).
1.1 Audience
This manual assumes that the users have some familiarity with hardware design; Ethernet protocols,
and various bus architectures. The audience of this technical reference manual is design engineers
familiar with the microprocessor / microcontroller architecture of their choice, and is not intended to
steer a customer towards any particular architecture. In contrast, the goal of this application note is to
provide information pertaining to the LAN91C111 to allow a design engineer to be able to connect the
device to any architecture.
2 Introduction
The SMSC LAN91C111 is a 32/16/8-bit Non-PCI Fast Ethernet controller that integrates on one chip
a Media Access Control (MAC) Layer, a Physical Layer (PHY), 8K Byte internal Dynamically
Configurable TX/RX FIFO SRAM.
The LAN91C111 supports dual speed 100Mbps or 10Mbps and the AutoNegotiation algorithm. By
turning on the AutoNegotiation mode, the chip automatically configures itself for either 10 or 100Mbps
modes, and either Full-Duplex or Half-Duplex mode; the results depend on the outcome of the
negotiation process.
The LAN91C111 is a 3.3V device; but its inputs and output of the host interface are 5V tolerant and
can directly interface to other 5V devices.
This 32-bit device can interface with multiple Embedded Microprocessor Host Interfaces due to its
flexible Bus Interface Unit (BIU). It can handle both asynchronous and synchronous transfers as long
as they are not simultaneously active. The synchronous bus clock can be supported up to 50Mhz.
There are two selectable LED's, they can be programmed to the following functions: Link, Activity,
Transmit, Receive, Full Duplex, and 10/100Mbps.
The SMSC LAN91C111 silicon has the following main sections:
Bus Interface Unit
Arbiter
Memory Management Unit
8Kbytes Internal SRAM
CSMA/CD