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SMSC LAN91C111 32/16/8-Bit Three-In-One Fast Ethernet Controller
Revision 1.0 (08-14-08) 32 SMSC AN 9.6
APPLICATION NOTE
4.9.2 Diagnostic Loopback
Setting the LPBK bit in the internal PHY MI serial port Control Register can enable diagnostic loopback
mode. When diagnostic loopback is enabled, transmitted data at the internal MII is looped back into
receive data output of the internal MII. The transmit enable signal is looped back into carrier sense
output at the internal MII level. The TP receive and transmit paths are disabled. The transmit link
pulses are halted, and the Half/Full Duplex modes do not change.
In order to have diagnostic loopback working properly and the MAC receive a packet with its own
source address, Full Duplex operation must be enabled. Setting the FDUPLX bit in the Transmit
Control Register will enable it.
Enabling Full Duplex operation will cause frames to be received if they pass the address filter
regardless of the source for the frame, so the LAN91C111 can receive a frame sourced by its self.
4.9.3 External Loopback
External Loopback can be accomplished by shorting the TX and RX Signals, the transmit signals are
looped back after leaving the PHY and the external magnetic. Again, the FDUPLX bit must be set, in
order to have the MAC to receive a frame sourced by the LAN91C111 itself.
The diagram below represents a simple diagram of the LAN91C111, plus external magnetics and RJ45
jack. The loopback at point A is an EPH loopback, which loops the packet back at the EPH block,
never leaving the MAC. The loopback at point B is a PHY loopback, which loops the packet back after