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SMSC LAN91C111 32/16/8-Bit Three-In-One Fast Ethernet Controller
Revision 1.0 (08-14-08) 2 SMSC AN 9.6
APPLICATION NOTE
Collision Detection
Encoder
Decoder
Scrambler
De-scrambler
Squelch Circuits
Clock & Data Recovery
AutoNegotiation & Link
Twisted Pair Transmitter
Twisted Pair Receiver
Figure 2.1 Detailed Internal Block Diagram
8-32 bit
Bus
Interface
Unit
Arbiter
DMA
MMU
Ethernet
Protocol
Handler
(EPH)
10/100
PHY
8K Byte
Dynamically
Allocated
SRAM
WR
FIFO
RD
FIFO
Control
RX Data
TX Data
Control
Control
MII
Address
Data
Control
Control
RXD[0-3]
TXD[0-3]
Control
TX/RX
FIFO
Pointer
TPI
TPO
Control
EEPROM
INTERFACE
32-bit Data
32-bit Data