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SMSC LAN91C111 32/16/8-Bit Three-In-One Fast Ethernet Controller
SMSC AN 9.6 51 Revision 1.0 (08-14-08)
APPLICATION NOTE
Write the pointer register (bank 2, offset 6) = 0x0000 + J * 2 (RCV=0, AUTOINC=0, Read=0,
Reserved=0, pointer=0x0000+J * 2)
Write DATA register (bank 2 offset 8) = data word
End Loop J
Loop for J = 0 to 1023 (total of 1024 words of data)
Write the pointer register (bank 2, offset 6) = 0x2000+ J * 2 (RCV=0, AUTOINC=0, Read=1,
Reserved=0, pointer=0x20000+J * 2)
Read DATA register (bank 2 offset 8) = data word
Compare data word read with previously written value for that address bit-by-bit for errors
End Loop J
End Loop I
9.3 Transmitting A Packet
These steps will allocate packet memory, write the packet buffer, queue the packet and send it out.
The transmitted packet will be a 64-byte packet, with source address = 0x000000000000 and
destination address = 0xFFFFFFFFFFF.
Allocate a packet
Write 0x0020 to the MMUCOM register (bank 2, offset 0)
Poll for Alloc INT bit
Read the INTERRUPT register (bank 2, offset C) until bit 3 (ALLOC INT) is set
Read allocated packet # from the ALLOCATION RESULT register (bank 2, offset 3)
Write this packet # into the PACKET NUMBER register (bank 2, offset 2)
Write the POINTER register for TX, WR, and AUTOINC
Write (bank 2, offset 6) = 0x4000
Write to the packet buffer
Write the following words to the DATA register (bank 2, offset 8):
Write 0x0000 (this is the status word; it will be written by the MAC with the transmit status word after the transmis-
sion is complete)
Write 0x0046 (this is the byte count; includes the packet size (64 bytes), plus the status word, byte count, control
byte, and last data byte = 70 bytes, or the packet size + 6 bytes)
Write the destination address (three successive writes: bytes 10, bytes 32, bytes 54)
Write 0xFFFF, 0xFFFF, 0xFFFF
Write the source address (three successive writes: bytes 10, bytes32, bytes 54)
Write 0x0000, 0x0000, 0x0000
Write 0x0040 (this is the packet size = 64 bytes)
Write the packet data (46 bytes of data, or 23 words if the LAN91C111 is configured to calculate and send the
CRC). If the CRC is to be included with the packet data and the 91C111 is configured not to send the CRC(bit
NOCRC is set in the Transmit Control Register (bank 0, offset 0)), then write 50 bytes or 25 words of data)
Write the control word (set CRC and/or ODD bits as necessary). If packet is odd, the extra data byte would be the
least significant byte of the control word.
Turn on the transmitter
Write 0x0001 to set the TXENA bit in the TRANSMIT CONTROL register (bank 0, offset 0)
Queue the packet
Write 0x00C0 to the MMUCOM register