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ARM Instruction Reference
4-4 Copyright © 2000, 2001 ARM Limited. All rights reserved. ARM DUI 0068B
4.1 Conditional execution
Almost all ARM instructions can include an optional condition code. This is shown in
syntax descriptions as
{cond}
. An instruction with a condition code is only executed if
the condition code flags in the CPSR meet the specified condition. The condition codes
that you can use are shown in Table 4-2.
Almost all ARM data processing instructions can optionally update the condition code
flags according to the result. To make an instruction update the flags, include the
S
suffix
as shown in the syntax description for the instruction.
Some instructions (
CMP
,
CMN
,
TST
and
TEQ
) do not require the
S
suffix. Their only function
is to update the flags. They always update the flags.
Flags are preserved until updated. A conditional instruction which is not executed has
no effect on the flags.
Table 4-2 ARM condition codes
Suffix Flags Meaning
EQ Z
set Equal
NE Z
clear Not equal
CS/HS C
set Higher or same (unsigned >= )
CC/LO C
clear Lower (unsigned < )
MI N
set Negative
PL N
clear Positive or zero
VS V
set Overflow
VC V
clear No overflow
HI C
set and
Z
clear Higher (unsigned <= )
LS C
clear or
Z
set Lower or same (unsigned <= )
GE N
and
V
the same Signed >=
LT N
and
V
different Signed <
GT Z
clear, and
N
and
V
the same Signed >
LE Z
set, or
N
and
V
different Signed <=
AL
Any Always (usually omitted)