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Thumb Instruction Reference
5-4 Copyright © 2000, 2001 ARM Limited. All rights reserved. ARM DUI 0068B
5.1 Thumb memory access instructions
This section contains the following subsections:
• LDR and STR, immediate offset on page 5-5
Load Register and Store Register. Address in memory specified as an immediate
offset from a value in a register.
• LDR and STR, register offset on page 5-7
Load Register and Store Register. Address in memory specified as a
register-based offset from a value in a register.
• LDR and STR, pc or sp relative on page 5-9
Load Register and Store Register. Address in memory specified as an immediate
offset from a value in the pc or the sp.
• PUSH and POP on page 5-11
Push low registers, and optionally the LR, onto the stack.
Pop low registers, and optionally the pc, off the stack.
• LDMIA and STMIA on page 5-13
Load and store multiple registers.