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ARM Instruction Reference
ARM DUI 0068B Copyright © 2000, 2001 ARM Limited. All rights reserved. 4-17
If your system has a system coprocessor, you can enable alignment checking. Non
doubleword-aligned 64-bit transfers cause an alignment exception if alignment
checking is enabled.
Architectures
These instructions are available in E variants of ARM architecture v5 and above.
Examples
LDRD r6,[r11]
LDRMID r4,[r7],r2
STRD r4,[r9,#24]
STRD r0,[r9,-r2]!
LDREQD r8,abc4
Incorrect examples
LDRD r1,[r6] ; Rd must be even.
STRD r14,[r9,#36] ; Rd must not be r14.
STRD r2,[r3],r6 ; Rn must not be Rd or R(d+1).