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Vector Floating-point Programming
ARM DUI 0068B Copyright © 2000, 2001 ARM Limited. All rights reserved. 6-23
6.7.7 FLD and FST
Floating-point load and store.
Syntax
FLD<precision>{cond} Fd, [Rn{, #offset}]
FST<precision>{cond} Fd, [Rn{, #offset}]
FLD<precision>{cond} Fd, label
FST<precision>{cond} Fd, label
where:
<precision>
must be either
S
for single-precision, or
D
for double-precision.
cond
is an optional condition code (see VFP and condition codes on page 6-8).
Fd
is the VFP register to be loaded or saved. The precision of
Fd
must match
the precision specified in
<precision>
.
Rn
is the ARM register holding the base address for the transfer.
offset
is an optional numeric expression. It must evaluate to a numeric constant
at assembly time. The value must be a multiple of 4, and lie in the range
–1020 to +1020. The value is added to the base address to form the
address used for the transfer.
label
is a program-relative expression. See Register-relative and
program-relative expressions on page 3-23 for more information.
label
must be within ±1KB of the current instruction.
Usage
The
FLD
instruction loads a floating-point register from memory. The
FST
instruction
saves the contents of a floating-point register to memory.
One word is transferred if
<precision>
is
S
. Two words are transferred if
<precision>
is
D
.
There is also an
FLD
pseudo-instruction (see FLD pseudo-instruction on page 6-38).
Examples
FLDD d5, [r7, #-12]