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Vector Floating-point Programming
ARM DUI 0068B Copyright © 2000, 2001 ARM Limited. All rights reserved. 6-31
6.7.12 FMRS and FMSR
Transfer contents between a single-precision floating-point register and an ARM
register.
Syntax
FMRS{cond} Rd, Sn
FMSR{cond} Sn, Rd
where:
cond
is an optional condition code (see VFP and condition codes on page 6-8).
Sn
is the VFP single-precision register.
Rd
is the ARM register.
Rd
must not be r15.
Usage
The
FMRS
instruction transfers the contents of
Sn
into
Rd
.
The
FMSR
instruction transfers the contents of
Rd
into
Sn
.
Exceptions
These instructions do not produce any exceptions.
Examples
FMRS r2, s0
FMSRNE s30, r5