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ARM Instruction Reference
4-44 Copyright © 2000, 2001 ARM Limited. All rights reserved. ARM DUI 0068B
4.4.3 SMULxy
Signed multiply (16-bit by 16-bit, 32-bit result).
Syntax
SMUL<x><y>{cond} Rd, Rm, Rs
where:
<x>
is either
B
or
T
.
B
means use the bottom end (bits [15:0]) of
Rm
,
T
means
use the top end (bits [31:16]) of
Rm
.
<y>
is either
B
or
T
.
B
means use the bottom end (bits [15:0]) of
Rs
,
T
means
use the top end (bits [31:16]) of
Rs
.
cond
is an optional condition code (see Conditional execution on page 4-4).
Rd
is the ARM register for the result.
Rm, Rs
are the ARM registers holding the values to be multiplied.
r15 cannot be used for any of
Rd
,
Rm
, or
Rs
.
Any combination of
Rd
,
Rm
, and
Rs
can use the same registers.
Usage
The
SMULxy
instruction multiplies the 16-bit signed integers from the selected halves of
Rm
and
Rs
, and places the 32-bit result in
Rd
.
Condition flags
This instruction does not affect any flags.
Architectures
This instruction is available in all E variants of ARM architecture v5 and above.
Example
SMULTBEQ r8,r7,r9