Filter
Top Products
ARM Instruction Reference
4-66 Copyright © 2000, 2001 ARM Limited. All rights reserved. ARM DUI 0068B
4.7.4 MRRC
Move to two ARM registers from coprocessor. Depending on the coprocessor, you
might be able to specify various operations in addition.
Syntax
MRRC{cond} coproc, opcode, Rd, Rn, CRm
where:
cond
is an optional condition code (see Conditional execution on page 4-4).
coproc
is the name of the coprocessor the instruction is for. The standard name
is
pn
, where
n
is an integer in the range 0-15.
opcode
is a coprocessor-specific opcode.
Rd, Rn
are ARM destination registers. You cannot use r15 for
Rd
or
Rn
.
CRm
is the coprocessor source register.
Usage
The use of this instruction depends on the coprocessor. See the coprocessor
documentation for details.
Architectures
MRRC
is available in E variants of ARM architecture v5 and above, excluding xP variants.