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ARM Instruction Reference
4-40 Copyright © 2000, 2001 ARM Limited. All rights reserved. ARM DUI 0068B
4.4.1 MUL and MLA
Multiply and multiply-accumulate (32-bit by 32-bit, bottom 32-bit result).
Syntax
MUL{cond}{S} Rd, Rm, Rs
MLA{cond}{S} Rd, Rm, Rs, Rn
where:
cond
is an optional condition code (see Conditional execution on page 4-4).
S
is an optional suffix. If
S
is specified, the condition code flags are updated
on the result of the operation (see Conditional execution on page 4-4).
Rd
is the ARM register for the result.
Rm, Rs, Rn
are ARM registers holding the operands.
r15 cannot be used for any of
Rd
,
Rm
,
Rs
, or
Rn
.
Rd
cannot be the same as
Rm
.
Usage
The
MUL
instruction multiplies the values from
Rm
and
Rs
, and places the least significant
32 bits of the result in
Rd
.
The
MLA
instruction multiplies the values from
Rm
and
Rs
, adds the value from
Rn
, and
places the least significant 32 bits of the result in
Rd
.
Condition flags
If
S
is specified, these instructions:
• update the N and Z flags according to the result
• do not affect the V flag
• corrupt the C flag in ARM architecture v4 and earlier
• do not affect the C flag in ARM architecture v5 and later.
Architectures
These instructions are available in ARM architecture v2 and above.