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EPSON EPL-6200/EPL-6200L Revision A
Operating Principles Operating Principles of Electric Circuitry 98
2.3.1.2 Main Control Circuit Board (C533Main) for EPL-6200L
EPL-6200L employs a newly developed controller for ESC/PageS Printing System.
PRINCIPAL FEATURES
All the functions, including those of the CPU, are incorporated in one ASIC
(called “SLC2”).
As the CPU core, C33 core made by EPSON is employed.
The algorithm of the extension circuit is BitRepeat3.
This controller is a fruit of the full pursuit of cost reduction:
2 MB of RAM (SDRAM is used), no optional RAM, no RITech and PGI
(EnhancedMicroGray), and resolution fixed to 600 dpi
Parallel interface (Nibble, ECP) and USB 1.1 interface
CONSTITUTION OF MAIN CONTROL CIRCUIT BOARD
Main Board Assy:
C534 MAIN
MAJOR ELEMENTS
Figure 2-35. C534 Controller Block Diagram
Table 2-12. Major Elements
Name Location Remarks
CPU/Clock -
EPSON
32bit-RISC CPU S1C33000, 24MHz
ASIC SLC2 IC100 E01A32AA
TTL IC105 SN74AHCT244PWR
ROM IC103
Reset IC: IC107 M51953BFP-600C
Regulator IC106 PQ033EZ01ZP
EEPROM IC104 S93C46ADFJ
SDRAM IC101 MSM56V16160F-10TS-K