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OCPRF100 MP Server System Technical Product Specification
Revision 1.0
97
Noise margin minimum on the high level is 0.2 V
DD
.
8.3.3 SCSI Controller
The SCSI controller selected for this backplane is an 8-bit SYM53C80S controller. Device selec-
tion is memory mapped at address FB00-FC00.
It is reset on power up and when reset is asserted to the backplane.
SYM53C80S access slows down the bus; it is recommended to pulse SAF-TE infrequently.
SAF_TE command processing is 2–10 ms. The following is a feature summary of the SCSI con-
troller:
• Supports the ANSI X3.131-1994 standard.
• Parity generation with optional checking.
• No external clock required.
• Onchip 48 mA single-ended drivers and receivers.
• Functions in both the target and initiator roles.
• Direct control of all SCSI signals.
• Asynchronous data transfers of up to 5.0 MB/second.
• Variety of packaging options.
• SCSI protocol efficiency is directly proportional to the speed of the microprocessor.
• CMOS parts provide additional grounding and controlled fall times that reduce noise gen-
erated by SCSI bus switching.
• SCAM level 1 and 2 compatibility.
8.4 LVDS SCSI Termination
8.4.1 LVDS Termination
The following is a list of the features of the LVDS SCSI termination.
Auto selection multimode single ended or low-voltage differential termination
2.7 V to 5.25 V operation
Differential failsafe bias
Thermal packaging for low junction temperature and better MTBF
Master/slave inputs
Supports active negation