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OCPRF100 MP Server System Technical Product Specification
Revision 1.0
116
ICMB/COM2 COM2_TO_SIO_EN Micro Port 1 - RW - 4
ICMB/COM2 COM2_TO_FP_EN_L Micro Port 1 - RW - 5
I
2
C Interfaces
I2C_BACKUP_SCL Micro Port 1 - RW - 6
I
2
C Interfaces
I2C_BACKUP_SDA Micro Port 1 - RW - 7
Not Applicable Not Applicable
(Upper Address Bus)
Micro Port 2 - - - 0 to 7
ICMB/COM2 MICRO_RXD Micro Port 3 - - - 0
ICMB/COM2 MICRO_TXD Micro Port 3 - - - 1
System Power PWR_INTR_L Micro Port 3 - R - 2
ICMB/COM2 MICRO_RXD_INTR_L Micro Port 3 - R - 3
I
2
C Interfaces
I2C_FPC_SCL Micro Port 3 - RW - 4
I
2
C Interfaces
I2C_FPC_SDA Micro Port 3 - RW - 5
Processor MICRO_WR_L Micro Port 3 - W - 6
Processor MICRO_RD_L Micro Port 3 - W - 7
Reserved Reserved Input Latch #0 FFC0 R - 0
Miscellaneous SECURE_MODE_BMC Input Latch #0 FFC0 R - 1
ICMB/COM2 RI_TTL_FP Input Latch #0 FFC0 R - 2
Reserved Reserved Input Latch #0 FFC0 R - 3
Reserved Reserved Input Latch #0 FFC0 R - 4
System Power PS_PWR_ON (input) Input Latch #0 FFC0 R - 5
ICMB/COM2 DCD_TTL_FP Input Latch #0 FFC0 R - 6
Reserved Reserved Input Latch #0 FFC0 R - 7
Reserved Reserved Input Latch #1 FFD0 R - 0
Fan Control FAN_TACH1 Input Latch #1 FFD0 R - 1
Fan Control FAN_TACH2 Input Latch #1 FFD0 R - 2
Fan Control FAN_TACH3 Input Latch #1 FFD0 R - 3
Fan Control FAN_TACH4 Input Latch #1 FFD0 R - 4
Fan Control FAN_TACH5 Input Latch #1 FFD0 R - 5
Fan Control FAN_TACH6 Input Latch #1 FFD0 R - 6
Reserved Reserved Input Latch #1 FFD0 R - 7
Table 10-2: I/O Signals and Devices