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OCPRF100 MP Server System Technical Product Specification
Revision 1.0
73
the system BIOS provides the run-time functions necessary to boot from an I
2
O mass-storage
adapter card. I
2
O devices are added to the interrupt 13h chain and booted using these calls.
6.2.3 Management
Management of clients and servers is a major issue for end users. The system BIOS supports
server management applications through the following specifications:
• Desktop Management Interface (DMI) Specification, Version 2.00
• System Management BIOS (SMBIOS) Reference Specification, Version 2.1
• Wired for Management Baseline Specification, Version 1.1a
The BIOS provides the data and interfaces required by the DMI specification. In addition, the
BIOS provides a memory image of DMI data to allow operating systems to read DMI structures
from protected-mode.
6.2.4 Configuration
Plug and Play compatibility allows most devices to be added to the system with no manual con-
figuration at all. The BIOS supports the following industry standards for full Plug and Play com-
patibility:
• Multiprocessor Specification (MPS), Versions 1.1 and 1.4
• Extended System Configuration Data Specification, Version 1.02a
• Plug and Play BIOS Specification, Version 1.0a
• Plug and Play ISA Specification, Version 1.0a
• PCI Specification, Revision 2.1
• PCI BIOS Specification, Revision 2.1
• PCI to PCI Bridge Specification, Revision 1.0
• PCI Power Management Specification, Revision 1.0
• PCI Hot-plug Specification, Revision 1.0
• POST Memory Manager (PMM) Specification, Version 1.01
Although the system contains no ISA slots, the Plug and Play ISA Specification is supported
because of the embedded peripherals.
The system BIOS can support either version of the Multiprocessor Specification. If version 1.1 is
selected, BIOS simply includes entries for the processors, buses, APICs, and interrupts. If ver-
sion 1.4 is selected, BIOS also creates entries describing the bus, memory, and I/O topology of
the system. BIOS Setup allows the user to specify which version of tables should be generated.
The BIOS allows users to use the SSU to specify PIC-mode interrupt assignments. This configu-
ration step is completely optional unless required by higher level software.