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OCPRF100 MP Server System Technical Product Specification
Revision 1.0
98
Standby (Disable Mode) 5µA
3 pF channel capacitance
8.4.2 Single Ended Termination
The following is a list of the features of the single-ended SCSI termination.
• Fully compliant with SCSI, SCSI-2, and SCSI-3 standards.
• Backward compatible to the DS2107* and DS2107A*.
• Provides active termination for nine signal lines.
• Laser-trimmed 110 ohm termination resistors have 2% tolerance.
• Low dropout voltage regulator.
• Power-down mode isolates termination resistors from the bus.
• Fully supports actively negated SCSI signals.
• Onboard thermal shutdown circuitry.
8.5 Programmable Logic
PLDs are used in order to enhance board simplicity, board layout, and design maintainability. The
backplane uses one Lattice* programmable logic device. The device is used for: address
decode, drive power control, and miscellaneous registers. The following is a summary of the pro-
grammable logic features:
• High-performance, E
2
CMOS technology.
• In-system programmability (ISP) via a simple 5-wire interface.
• 7.5 ns propagation delays with up a 125-MHz maximum operating frequency.
• Complete programmable device can combine glue logic and structured designs.
• Unused product term shutdown saves power.
• Programmable output slew rate control to minimize switching noise.
8.6 Memory Map
This section describes the microcontroller memory map and individual regions of memory.
80C652 architecture allows up to 64KB of byte-addressable memory. No I/O space is provided,
since 80C652 architecture makes no distinction between memory and I/O addresses (all I/O
accesses are memory-mapped). However, four I/O ports available to the microcontroller are also
defined in this chapter.
8.6.1 Memory Map
Figure 8-4 shows the memory map viewed from the perspective of the microcontroller.