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GPIB-1014 User Manual Index-9 © National Instruments Corporation
parts list and schematic diagrams, B-1 to B-9
theory of operation
68450 DMAC, 6-14 to 6-23
address decoding, 6-3 to 6-4
clock and reset circuitry, 6-4 to 6-5
Configuration registers, 6-5 to 6-6
DMA gating and control, 6-7 to 6-8
DTB requester and controller, 6-9 to 6-12
GPIB interface, 6-23 to 6-24
GPIB synchronization and interrupt control, 6-12 to 6-14
interrupter, 6-9
test and troubleshooting, 6-24
timing state machine, 6-6 to 6-7
VMEbus interface, 6-1 to 6-3
with VMEbus computer (illustration), 2-9
GPIB Controller. See Controller function.
GPIB Synchronization and Interrupt Control
definition of, 2-12
theory of operation, 6-12 to 6-14
GPIB TLC. See Talker/Listener/Controller (TLC).
GTL (Go To Local) command, 4-25
H
handshake lines
DAV (data valid), E-3
NDAC (not data accepted), E-3
NRFD (not ready for data), E-2
overview, E-2
hidden registers
Auxiliary Register A (AUXRA), 4-37 to 4-38
Auxiliary Register B (AUXRB), 4-39 to 4-40
Auxiliary Register E (AUXRE), 4-41
Internal Counter Register (ICR), 4-34
overview, 4-33
Parallel Poll Register (PPR), 4-35 to 4-36
HLDA (Holdoff on All Bit), 4-38
HLDE (Holdoff on END Bit), 4-38
HLT (Halt Bit), 4-56, 6-18
I
ICR. See Internal Counter Register (ICR).
IEEE 488 standard
GPIB-1014 capabilities, 2-13 to 2-15
GPIB-1014 compatibility, 1-1
IEEE 1014 standard