National Instruments 320030-01 Printer Accessories User Manual


 
General Description Chapter 2
GPIB-1014 User Manual 2-12 © National Instruments Corporation
The interface consists of these major components, which are discussed in greater detail in
Chapter 6.
VMEbus Interface Consists of the buffers, drivers, and transceivers for the
address, data, status, and control lines used on the VMEbus,
plus other logic circuitry that converts internal signals to
bus-compatible signals.
Address Decoder Recognizes when the VMEbus master addresses one of the
GPIB-1014 registers and generates the appropriate strobe to
begin the data transfer.
Clock and Reset Circuitry Monitors the VMEbus utility signals to generate the 8-MHz
clock used by the TLC and DMAC and to detect System
Reset, Power Failure, and Bus Error conditions.
Configuration Registers Programmably configures some of the operating parameters
of the GPIB-1014.
Timing State Machine Controls the timing of DMA transfers and accesses to the
GPIB-1014 from the VMEbus.
DMA Gating and Control Controls the DMA request/acknowledge interface between
the DMAC and the TLC.
Interrupter Implements the VMEbus priority interrupt protocol,
allowing the GPIB-1014 to request and respond to an
interrupt acknowledge cycle. All interrupt conditions are
also detectable by polling.
DTB Control Transceivers Performs the necessary VMEbus protocol to request,
obtain, and release control of the VME system bus. Once
configured for a DMA transfer, the GPIB-1014
automatically performs data transfers between the GPIB
and VMEbus memory.
GPIB Synchronization and Detects the synchronization of the GPIB after the last byte
Interrupt Control in a DMA transfer (all devices on the GPIB have accepted
the last byte) and detects interrupting conditions from the
TLC. TLC interrupt requests are routed through the
DMAC, which notifies the Interrupter when either a TLC
interrupt or one of its own internal interrupt conditions is
detected.
DMAC (68450) Controls DMA transfers between the GPIB and the
VMEbus. The DMA Gating and Control circuitry controls
the DMA request/acknowledge interface between the TLC
and the DMAC.
GPIB TLC (NEC µPD7210) Implements many of the GPIB interface functions, either
independently or with assistance of or interpretation by the
controlling program. Together with special transceivers,
the TLC forms the GPIB interface side of the GPIB-1014.