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Chapter 4 Register Descriptions
© National Instruments Corporation 4-41 GPIB-1014 User Manual
Auxiliary Register E (AUXRE)
VMEbus Address: Base Address + 11B (hex)
AUXMR Control Code: 110 (Binary, Bits 7 - 5)
Attributes: Write Only, Internal to TLC
Accessed through AUXMR
4321 0
W
0
0
0 DHDC DHDT
Writing to Auxiliary Register E (AUXRE) is done via the AUXMR. Writing the binary value
110 into the Control Code (CNT[2-0]) and a bit pattern into the the lower five bits of the
AUXMR (COM[4-0]) causes the two lowest order bits to be written to AUXRE. The 2-bit code,
DHDC and DHDT, determines how the TLC may be placed into DAC Holdoff.
Bit Mnemonic Description
4-2w 0 Reserved Bits
Write zeros to these bits.
1w DHDC DAC Holdoff on DCAS Bit
Setting DHDC enables DAC Holdoff when the TLC enters Device
Clear Active State (DCAS). Clearing DHDC disables DAC Holdoff
on DCAS. Issuing the Finish Handshake auxiliary command releases
the Holdoff.
0w DHDT DAC Holdoff on DTAS Bit
Setting DHDT enables DAC Holdoff when the TLC enters Device
Trigger Active State (DTAS). Clearing DHDT disables DAC Holdoff
on DTAS. Issuing the Finish Handshake auxiliary command releases
the Holdoff.