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GPIB-1014 User Manual Index-15 © National Instruments Corporation
overview, 5-6
programmed implementation, 5-6
R
READ sample program, C-12 to C-13
RECEIVE-RCV sample program, C-11
receiving messages. See sending/receiving messages.
registers
Configuration registers
definition of, 2-12
DMA Configuration registers, 4-64 to 4-67
GPIB-1014 Configuration registers (chart), 2-5
DMA registers
68450 internal DMA registers (chart), 2-5
address registers, 4-48
Base Address Register (BAR), 4-48
Base Transfer Counter Register (MTCR), 4-48
Channel Control Register, 4-56 to 4-57
Channel Error Register, 4-60
Channel Priority Register, 4-61
Channel Status Register, 4-58 to 4-59
Configuration Registers, 4-64 to 4-67
Device Address Register (BAR), 4-48
Device Control Register, 4-51 to 4-52
DMAC DMA channel register set (chart), 4-46
Function Code Registers, 4-50
General Control Register, 4-63
Interrupt Vector Registers, 4-62
Memory Address Register (MAR), 4-48
Memory Transfer Counter Register (MTCR), 4-48
Operation Control Register, 4-53 to 4-54
overview, 4-46 to 4-48
register memory map, 4-47
Sequence Control Register, 4-55
transfer count registers, 4-48 to 4-49
format for description of, 4-3
interface registers
Address Mode Register (ADMR), 4-22 to 4-24
Address Status Register (ADSR), 4-20 to 4-21
Auxiliary Mode Register (AUXMR), 4-27 to 4-33
Command/Data Out Register (CDOR), 4-7
Command Pass Through Register (CPTR), 4-25 to 4-26
Data In Register (DIR), 4-6
hidden registers, 4-33 to 4-41
illustration, 4-4
Interrupt Mask Register 1 (IMR1), 4-8 to 4-13
Interrupt Mask Register 2 (IMR2), 4-14 to 4-18