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Chapter 2 General Description
© National Instruments Corporation 2-15 GPIB-1014 User Manual
• Receive control
• Pass control
• Conduct a Parallel Poll
• Take control synchronously or asynchronously
Table 2-6 contains the GPIB-1014 IEEE 1014 compliance levels.
Table 2-6. GPIB-1014 IEEE 1014 Interrupter Compliance Levels
Compliance Notation Description
Bus Slave Compliance Levels
D8(O) 8-bit data path to TLC and two Configuration Registers
D16 & D8(EO) 8- or 16-bit data path to DMAC registers
A16 Responds to 16-bit short I/O addresses when specified
on the address modifier lines.
ADO Accommodate Address Only cycles
Interrupter Compliance Levels
D8(O) Provides an 8-bit status/ID byte on D00-D07
RORA Releases its interrupt request line when an onboard
register is accessed
Bus Master Compliance Levels
D8(EO) 8-bit data path for GPIB DMA transfers
D16 & D8(EO) 8- or 16-bit memory-to-memory DMA transfers
A24 24-bit memory address path
DTB Requester Compliance Level
ROR Programmable Release on Request Feature