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5-8-2 AND LOAD and OR LOAD
Ladder Symbol
AND LOAD – AND LD
00002
00003
00000
00001
Ladder Symbol
OR LOAD – OR LD
00000 00001
00002 00003
Description When instructions are combined into blocks that cannot be logically combined
using only OR and AND operations, AND LD and OR LD are used. Whereas
AND and OR operations logically combine a bit status and an execution condi-
tion, AND LD and OR LD logically combine two execution conditions, the current
one and the last unused one.
In order to draw ladder diagrams, it is not necessary to use AND LD and OR LD
instructions, nor are they necessary when inputting ladder diagrams directly, as
is possible from SSS. They are required, however, to convert the program to and
input it in mnemonic form. The procedures for these, limitations for different pro-
cedures, and examples are provided in 4-7 Inputting, Modifying, and Checking
the Program.
In order to reduce the number of programming instructions required, a basic un-
derstanding of logic block instructions is required. For an introduction to logic
blocks, refer to 4-4-6 Logic Block Instructions.
Flags There are no flags affected by these instructions.
5-9 Bit Control Instructions
There are five instructions that can be used generally to control individual bit sta-
tus. These are OUT, OUT NOT, DIFU(13), DIFD(14), and KEEP(11). These
instructions are used to turn bits ON and OFF in different ways.
5-9-1 OUTPUT and OUTPUT NOT – OUT and OUT NOT
B: Bit
IR, SR, AR, HR, TC, LR, TR
Ladder Symbol Operand Data Areas
OUTPUT – OUT
B
B: Bit
IR, SR, AR, HR, TC, LR
Ladder Symbol Operand Data Areas
OUTPUT NOT – OUT NOT
B
Limitations Any output bit can generally be used in only one instruction that controls its sta-
tus. Refer to 3-3 IR Area for details.
Description OUT and OUT NOT are used to control the status of the designated bit according
to the execution condition.
Bit Control Instructions Section 5-9