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002; 00000 in an inverse condition is necessary to reset TIM 002 when 00000
goes ON and 00500 is necessary to activate TIM 002 (when 00000 is OFF).
00000
00500 00000
TIM 001
TIM 002
005.0 s
003.0 s
00000
00500
5.0 s 3.0 s
TIM 001
#0050
S
R
KEEP(11)
00500
TIM 002
#0030
Address Instruction Operands
00000 LD 00000
00001 TIM 001
# 0050
00002 LD 00500
00003 AND NOT 00000
00004 TIM 002
# 0030
00005 LD TIM 001
00006 LD TIM 002
00007 KEEP(11) 00500
The length of time that a bit is kept ON or OFF can be controlled by combining
TIM with OUT or OUT NO. The following diagram demonstrates how this is pos-
sible. In this example, 00204 would remain ON for 1.5 seconds after 00000 goes
ON regardless of the time 00000 stays ON. This is achieved by using 01000 as a
self-maintaining bit activated by 00000 and turning ON 00204 through it. When
TIM 001 comes ON (i.e., when the SV of TIM 001 has expired), 00204 will be
turned OFF through TIM 001 (i.e., TIM 001 will turn ON which, as an inverse
condition, creates an OFF execution condition for OUT 00204).
01000 TIM 001
00000
01000
01000 TIM 001
01000
00204
001.5 s
00000
00204
1.5 s 1.5 s
TIM 001
#0015
Address Instruction Operands
00000 LD 01000
00001 AND NOT TIM 001
00002 OR 00000
00003 OUT 01000
00004 LD 01000
00005 TIM 001
# 0015
00006 LD 01000
00007 AND NOT TIM 001
00008 OUT 00204
Example 4:
One-Shot Bits
Timer and Counter Instructions Section 5-14