Omron C200HX Computer Hardware User Manual


 
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started. The program must be designed to allow for this when required by the
application. (See the section on data concurrence for further details.)
Input Interrupts Input interrupts are executed when external inputs are received via an Interrupt
Input Unit. Up to two Interrupt Input Units can be mounted to the CPU Rack and
each Interrupt Input Unit provides 8 inputs numbered IN 0 through IN7.
Inputs IN0 through IN7 on the first Unit generate interrupts #00 to #07 and inputs
IN0 through IN7 on the second Unit generate interrupts #08 to #15. Generally
speaking, subroutines #00 to #15 are executed when interrupts #00 to #15 are
generated.
Scheduled Interrupts Scheduled interrupts can be executed at intervals set either in increments of
10 ms or in increments or 1 ms. Interrupt #99 is used and subroutine #99 is
executed.
The unit used to set the scheduled interrupt interval is set in the PC Setup at
DM 6622.
15 00
DM 6622
Bit
Schedule Interrupt Setting Interval Setting Enable
00: Setting disabled (interval fixed at 10 ms)
01: Setting in bits 00 to 07 enabled
Schedule Interrupt Setting Interval Setting
00: 10 ms
01: 1 ms
Interrupt Priority The specified subroutine will be executed when an interrupt is generated. If fur-
ther interrupts are generated during execution of an interrupt subroutine, they
will not be processed until execution of the current interrupt subroutine has been
completed. If more than one interrupt is generated or is awaiting execution at the
same time, the corresponding subroutines will be executed in the following order
of priority.
Input interrupt 1 > input interrupt 2 > ... > input interrupt 7 > scheduled interrupt
I/O for Special I/O Units can be refreshed from within interrupt subroutines by
using the I/O REFRESH (IORF) instruction. If the high-speed interrupt mode is
used, refreshing in the normal cycle (END refreshing and IORF refreshing in the
main program) must be disabled for the Special I/O Unit that is to be refreshed in
the interrupt subroutine. An interrupt programming error (system FAL error 8B)
will occur if the same special I/O is refreshed both within an interrupt program
and within the normal cycle, and the special I/O will not be refreshed within the
interrupt subroutine.
The PC Setup contains settings in DM 6620 that disable refreshing in the normal
cycle for specific Special I/O Units. This settings are as shown below.
Interrupt mode
(1 = high-speed)
Bit 15 00
Unit #0
Unit #1
.
.
.
Unit #9
DM6620
12
1 00**********
Special I/O in Interrupt
Subroutines
Subroutines and Interrupt Control Section 5-23