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Erase Operation
PRELIMINARY
2-14
PRELIMINARY
2.6 Erase Operation
The erase operation of the ’F20x/F24x flash module prepares the flash array
for programming and enables reprogrammability of the flash array. Before the
array can be erased, all bits must be programmed to 0s. This procedure of pro-
gramming all array locations in preparation for the erase is called
clearing the
array
. During the erase, all bits in the array are changed from 0s to 1s. After
the erase is finished, a depletion mode test is made to determine whether any
bits have been over-erased. If over-erased bits are detected, they must be re-
covered with the flash-write algorithm, and the clear and erase algorithms
must be repeated.
An
erase pulse
is the time during the erase operation between the setting and
the clearing of the EXE bit ( bit 0 of SEG_CTR). During the erase pulse, the
level on all array bits is modified via the erase mechanism.
Erasing the flash array is a block operation. During the erase pulse, all array
bits are affected simultaneously. (See Figure 2–1,
Flash Memory Logic Lev-
els During Programming and Erasing
, on page 2-4 for an illustration of
this mechanism.) Multiple erase pulses may be required to fully erase all bits
in the array, and the application of erase pulses is controlled by the erase algo-
rithm.
The erase operation uses the VER1 read mode to determine when erasure is
complete. After erasure is complete, the inverse-erase read mode is used to
determine if any bits are over-erased. For more information about these read
modes, see section 2.4,
Read Modes
, on page 2-12.