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Assembly Source for Algorithms
PRELIMINARY
A-26
PRELIMINARY
SPLK #0000h,SPAD2
***********The next instruction is for F240 only*************
.if F24X = 1 ;Assemble for F24X only.
OUT SPAD2,F24X_ACCS ;Enable F240 flash reg mode.
;SPAD1 is dummy value.
.endif
*************************************************************
.if F24X = 0 ;Assemble for F206 only.
LACC FL_ST
SUB #4000h
BCND reg1,geq ;if address>= 4000h,set
;set reg mode for flash1 array
OUT SPAD2,F_ACCESS0 ;Change mode of flash0.
RET
reg1 OUT SPAD2,F_ACCESS1 ;Change mode of flash1.
.endif
RET ;RETURN TO CALLING SEQUENCE
.page
****************************************************
* ARRAY Sets MODE bit of F_ACCESS0/1 to access **
* the flash array. **
****************************************************
.sect ”ARY”
ARRAY
SPLK #0001h,SPAD2
***********The next instruction is for F240 only*************
.if F24X = 1 ;Assemble for F240 only.
IN SPAD1,F24X_ACCS ;Enable F240 flash array mode.
;SPAD1 is dummy value.
.endif
*************************************************************
.if F24X = 0 ;Assemble for F206 only.
LACC FL_ST
SUB #4000h
BCND ary1,geq ;if address>= 4000h,set
;set reg mode for flash1 array
OUT SPAD2,F_ACCESS0 ;Change mode of flash0.
RET
ary1 OUT SPAD2,F_ACCESS1 ;Change mode of flash1.
.endif
RET ;RETURN TO CALLING SEQUENCE
.end