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Assembly Source for Algorithms
PRELIMINARY
A-24
PRELIMINARY
LACL FL_ST ;ACC => FLASH *
SPLK #VER0,SPAD1 ;ACTIVATE VER0 *
TBLW SPAD1 ;EXECUTE COMMAND *
LAR AR6,#D10 ;SET DELAY *
CALL DELAY,*,AR6 ;WAIT *
CALL ARRAY ;ACCESS FLASH ARRAY *
LACL FL_ADRS ;POINT TO ADRS *
TBLR FL_DATA ;GET FLASH WORD 1x read *
TBLR FL_DATA ; 2x read *
TBLR FL_DATA ; 3x read *
CALL REGS ;ACCESS FLASH REGISTERS *
LACL FL_ST ;ACC => FLASH *
SPLK #STOP,SPAD1 ;DEACTIVATE VER0 *
TBLW SPAD1 ;EXECUTE COMMAND *
LAR AR6,#D10 ;SET DELAY *
CALL DELAY,*,AR6 ;WAIT *
CALL ARRAY ;ACCESS FLASH ARRAY *
RET ;RETURN TO CALLING SEQUENCE *
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* PRG_BYTE: Programs hi or lo byte depending on*
* byte mask (BASE_5). *
*************************************************
PRG_BYTE:
CALL SET_RD_VER0 ;Read word at VER0 level.
MAR *,AR3 ;ARP –> buffer addr index.
LACL * ;Get word to program.
XOR FL_DATA ;Xor with read–back value.
AND BASE_5 ;Mask off hi/lo byte.
BCND PB_END,EQ ;If zero then done.
XOR #0FFFFh ;else, mask off good bits.
SACL FL_DATA ;New data.
CALL EXE_PGM ;PGM Pulse.
SPLK #0,BASE_0 ;Set row done flag = 0(False).
PB_END RET
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.end