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Erase Algorithm
PRELIMINARY
3-13
Algorithm Implementations and Software Considerations
PRELIMINARY
Figure 3–5. Erase Algorithm Flow
Program array
check
Depletion
Yes
No
All
32 words
= 0000h?
Read first
32 words
Wait for
t
d(BUSY-INVERSE)
Set VER0 and
VER1 bits in
SEG_CTR
Clear all bits
in SEG_CTR
Start
(all words=0000h)
erase
Verify
No
Yes
No
Yes
Erase
pulse count
≥ Max
†
?
Device failure
Apply one
erase pulse
to flash array
(see Table 3–2)
All
words =
FFFFh
?
Read all locations
using address
complementing
Wait for
t
d(BUSY-VERIFY)
Set VER1
bit in SEG_CTR
†
See the device data sheet for
the timing parameter values.
Depletion
recovery