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Assembly Source for Algorithms
PRELIMINARY
A-8
PRELIMINARY
* SPAD2 Flash program + EXE command. *
*************************************************************
EXE_PGM ;*
CALL ARRAY ;ACCESS ARRAY *
*LOAD WADRS AND WDATA **
LACL FL_ADRS ;ACC => PROGRAM ADRS *
TBLW FL_DATA ;LOAD WADRS AND WDATA *
CALL REGS ;ACCESS FLASH REGS *
*SET UP WRITE COMMAND WORDS **
LACL PROTECT ;GET SEGMENT PROTECT MASK **
OR #WR_CMND ;OR IN WRITE COMMAND **
SACL SPAD1 ;SPAD1 = WRITE COMMAND **
OR #WR_EXE ;OR IN EXEBIN COMMAND **
SACL SPAD2 ;SPAD2 = WRITE EXE COMMAND **
* *
LACL FL_ST ;ACC => 0 (FLASH0) *
* ACTIVATE WRITE BIT **
TBLW SPAD1 ;EXECUTE COMMAND **
LAR AR6,#D10 ;SET DELAY **
CALL DELAY,*,AR6 ;WAIT **
* SET EXEBIN BIT **
TBLW SPAD2 ;EXECUTE COMMAND **
LAR AR6,#D100 ;SET DELAY **
CALL DELAY,*,AR6 ;WAIT **
* STOP WRITE OPERATION *
SPLK #0,SPAD1 ;SHUTDOWN WRITE OPERATION *
TBLW SPAD1 ;EXECUTE COMMAND *
LAR AR6,#D10 ;SET DELAY *
CALL DELAY,*,AR6 ;WAIT *
* *
RET ;RETURN TO CALLING SEQUENCE*
************************************************************
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************************************************************
* ACTIVATE VER0 ON FLASH READS *
* LOADS FLASH WORD AT ADDR FL_ADRS TO FL_DATA. *
* Uses SPAD1 for temporary storage of flash commands. *
************************************************************
SET_RD_VER0 ;*
CALL REGS ;ACCESS FLASH REGISTERS *
LACL FL_ST ;ACC => FLASH *
SPLK #VER0,SPAD1 ;ACTIVATE VER0 *
TBLW SPAD1 ;EXECUTE COMMAND*
LAR AR6,#D10 ;SET DELAY *
CALL DELAY,*,AR6 ;WAIT *
CALL ARRAY ;ACCESS FLASH ARRAY *
LACL FL_ADRS ;POINT TO ADRS *
TBLR FL_DATA ;GET FLASH WORD 1x read *
TBLR FL_DATA ;2x read *
TBLR FL_DATA ;3x read *
CALL REGS ;ACCESS FLASH REGISTERS *
LACL FL_ST ;ACC => FLASH *
SPLK #STOP,SPAD1 ;DEACTIVATE VER0 *