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PERC 3/DC and PERC 3/DCL Features 69
PCI Bridge/CPU
Both PERC 3/DC and PERC 3/DCL use the Intel i960RN PCI bridge with
an embedded i960RN RISC processor running at 100 MHz. The RN bridge
handles data transfers between the primary (host) PCI bus, the secondary
PCI bus, cache memory, and the SCSI bus. The DMA controller supports
chaining and unaligned data transfers. The embedded i960JN CPU directs
all controller functions, including command processing, SCSI bus transfers,
RAID processing, drive rebuilding, cache management, and error recovery.
Cache configuration 64 MB or 128 MB DIMM
Firmware 1 MB × 8 flash ROM
Nonvolatile random access
memory (RAM)
32 KB × 8 for storing RAID configuration
Operating voltage 5 V, 3.3 V
SCSI controller Two SCSI controllers for 160M and Wide support.
SCSI data transfer rate Up to 160 MB/s per channel
SCSI bus LVD or single-ended
SCSI termination Active
Termination disable Automatic through cable and device detection
Devices per SCSI channel Up to 15 wide or seven narrow SCSI devices.
SCSI device types Synchronous or asynchronous.
RAID levels supported 0, 1, 5, 10, and 50
SCSI connectors Two 68-pin internal high-density connectors for 16-
bit SCSI devices. Two ultra-high density 68-pin
external connectors for 160M and Wide SCSI.
Serial port 3-pin RS232C-compatible connector (for
manufacturing use only)
Table 5-7. PERC 3/DC and PERC 3/DCL Specifications
Parameter Specification