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26 EPSON S1C63558 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Oscillation Circuit)
4.3.3 OSC3 oscillation circuit
The S1C63558 has built-in the OSC3 oscillation circuit that generates the CPU's sub-clock (3.58 MHz) for
high speed operation and the source clock for peripheral circuits needing a high speed clock (program-
mable timer, FOUT output). To configure a ceramic oscillation circuit, a ceramic oscillator and two
capacitors (gate and drain capacitance) are required. Figure 4.3.3.1 is the block diagram of the OSC3
oscillation circuit.
V
SS
C
GC
C
DC
Ceramic
OSC4
OSC3
R
R
DC
FC
To CPU
(and some peripheral circuits)
Oscillation circuit control signal
Fig. 4.3.3.1 OSC3 oscillation circuit
As shown in Figure 4.3.3.1, the ceramic oscillation circuit can be configured by connecting the ceramic
oscillator (3.58 MHz) between the OSC3 and OSC4 terminals, capacitor CGC between the OSC3 and OSC4
terminals, and capacitor C
DC between the OSC4 and VSS terminals. For both CGC and CDC, connect
capacitors that are about 30 pF. To reduce current consumption of the OSC3 oscillation circuit, oscillation
can be stopped by the software (OSCC register).
4.3.4 Switching the CPU operating clock
The CPU system clock is switched to OSC1 or OSC3 by the software (CLKCHG register).
When OSC3 is to be used as the CPU system clock, first turn the OSC3 oscillation ON and switch the
clock after waiting 5 msec or more for oscillation stabilization.
When switching from OSC3 to OSC1, turn the OSC3 oscillation circuit OFF after switching the clock.
OSC1
→
OSC3 OSC3
→
OSC1
1. Set OSCC to "1" (OSC3 oscillation ON). 1. Set CLKCHG to "0" (OSC3 → OSC1).
2. Maintain 5 msec or more. 2. Set OSCC to "0" (OSC3 oscillation OFF).
3. Set CLKCHG to "1" (OSC1 → OSC3).
Note: When switching the clock form OSC3 to OSC1, use a separate instruction for switching the OSC3
oscillation OFF. An error in the CPU operation can result if this processing is performed at the
same time by the one instruction.
4.3.5 Clock frequency and instruction execution time
Table 4.3.5.1 shows the instruction execution time according to each frequency of the system clock.
Table 4.3.5.1 Clock frequency and instruction execution time
Clock frequency
OSC1: 32.768 kHz
OSC3: 3.58 MHz
Instruction execution time (µsec)
1-cycle instruction 2-cycle instruction 3-cycle instruction
61 122 183
0.56 1.12 1.68