Intel 317698-001 Switch User Manual


 
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82575 Ethernet Controller Design Guide
Contents
1.0 Introduction..............................................................................................................1
1.1 Scope................................................................................................................1
1.2 Reference Documents..........................................................................................2
2.0 PCI Express Port Connection to the Device................................................................3
2.1 PCI Express Reference Clock.................................................................................3
2.2 Other PCI Express Signals ....................................................................................3
2.3 Physical Layer Features........................................................................................3
2.3.1 Link Width Configuration ...........................................................................3
2.3.2 Polarity Inversion .....................................................................................4
2.3.3 Lane Reversal..........................................................................................4
2.4 PCI Express Routing ............................................................................................5
3.0 Ethernet Component Design Guidelines .....................................................................7
3.1 General Design Considerations for Ethernet Controllers ............................................7
3.1.1 Clock Source ...........................................................................................7
3.1.2 Magnetics for 1000 BASE-T........................................................................7
3.2 Designing with the 82575/EB/ES Gigabit Ethernet Controller.....................................8
3.2.1 LAN Disable for 82575 Ethernet Controller Gigabit Ethernet Controller.............9
3.2.2 Serial EEPROM.......................................................................................10
3.2.3 EEPROM Map Information........................................................................11
3.2.4 FLASH .................................................................................................. 12
3.3 SMBus and NC-SI..............................................................................................14
3.4 Power Supplies for the 82575 Ethernet Controller Controllers .................................. 15
3.4.1 82575 Ethernet Controller Power Sequencing............................................. 17
3.4.2 82575 Ethernet Controller Device Power Supply Filtering ............................. 19
3.4.3 82575 Ethernet Controller Controller Power Management and Wake Up ......... 19
3.4.4 Power Management ................................................................................20
3.5 82575 Ethernet Controller Device Test Capability................................................... 22
3.6 PHY Functionality .............................................................................................. 22
3.6.1 Auto Cross-over for MDI and MDI-X resolution ...........................................22
3.6.2 Smartspeed........................................................................................... 23
3.6.3 Flow Control ..........................................................................................23
3.6.4 Low-Power Link Up................................................................................. 23
3.6.5 Link Energy Detect .................................................................................24
3.6.6 Polarity Correction.................................................................................. 24
3.6.7 Auto-Negotiation differences between PHY, SerDes and SGMII ..................... 25
3.6.8 Copper PHY Link Configuration.................................................................25
3.7 Copper/Fiber Switch .......................................................................................... 26
3.8 Device Disable..................................................................................................27
3.8.1 BIOS handling of Device Disable...............................................................28
3.9 Software-Definable Pins (SDPs)........................................................................... 28
4.0 Frequency Control Device Design Considerations..................................................... 30
4.1 Frequency Control Component Types ................................................................... 30
4.1.1 Quartz Crystal ....................................................................................... 30
4.1.2 Fixed Crystal Oscillator............................................................................ 30
4.1.3 Programmable Crystal Oscillators ............................................................. 31
4.1.4 Ceramic Resonator ................................................................................. 31
5.0 Crystal Selection Parameters...................................................................................32
5.1 Vibrational Mode ............................................................................................... 32
5.2 Nominal Frequency............................................................................................ 32