Intel 317698-001 Switch User Manual


 
27
82575 Ethernet Controller Design Guide
The 82575 will put the PHY in power down unless CONNSW.ASCLR_DIS is set. In
such a case the host driver is responsible for the clearing of the AUTOSENSE_EN bit
According to the result of the interrupt, the software can then decide to switch to the
other core.
The following procedures need to be followed to actually switch between the two
modes:
Internal PHY-to-SerDes Transition
Disable Receiver by clearing RCTL.RXEN
Disable Transmitter by clearing TCTL.EN
Verify the device has stopped processing outstanding cycles and is idle.
Modify LINK mode to SER/DES or SGMII by setting CTRL_EXT.LINK_MODE to 10b
or 11b respectively.
Enable/Disable flow control values within the MAC.
Set up Tx and Rx queues and enable Tx and Rx processes.
SerDes-to-Internal PHY Transition
Disable Receiver by clearing RCTL.RXEN
Disable Transmitter by clearing TCTL.EN
Verify the 82575 has stopped processing outstanding cycles and is idle.
Modify LINK mode to PHY mode by setting CTRL_EXT.LINK_MODE to 00b.
Set Link Up indication by setting CTRL.SLU
Reset the PHY.by setting CTRL.PHY_RST, waiting 10 ms and clearing
CTRL.PHY_RST.
Set up PHY with desired auto-negotiation parameters
Set up Tx and Rx queues and enable Tx and Rx processes.
The device's link mode is controlled by the Extended Device Control register --
CTRL_EXT (0x00018) bits 23:22. The default value for the LINK_MODE setting is
directly mapped from the EEPROM's initialization Control Word 3 (bits 1:0). Software
can modify the LINK_MODE indication by writing the corresponding value into this
register.
Note: Before dynamically cycling a mode, ensure via the software device driver that the
current mode of operation is not in the process of transmitting or receiving data. This is
achieved by disabling the transmitter and receiver, waiting until the device is in an idle
state, and then beginning the process for changing the link mode.
Note: The mode switch in this method, is only valid until the next hardware reset of the chip.
After hardware reset the link mode is restored to the default set by the EEPROM. To get
a permanent change of the link mode, the default in the EEPROM should be changed.
3.8 Device Disable
For a LOM design, it may be desirable for the system to provide BIOS-setup capability
for selectively enabling or disabling LOM devices. This may allow the end-user more
control over system resource-management, avoid conflicts with add-in NIC solutions,
etc. the 82575 Ethernet Controller provides support for selectively enabling or disabling
it.